Mouri Zadeh Khaki, A., Farshidi, E., Ansari Asl, K.. (1398). A Novel Low-Power FPGA-based 1-1 MASH ΔΣ Time-to-Digital Converter Employing one Counter for both Stages. فناوری آموزش, 7(2), 173-182. doi: 10.22061/jecei.2020.6673.333
A. Mouri Zadeh Khaki; E. Farshidi; K. Ansari Asl. "A Novel Low-Power FPGA-based 1-1 MASH ΔΣ Time-to-Digital Converter Employing one Counter for both Stages". فناوری آموزش, 7, 2, 1398, 173-182. doi: 10.22061/jecei.2020.6673.333
Mouri Zadeh Khaki, A., Farshidi, E., Ansari Asl, K.. (1398). 'A Novel Low-Power FPGA-based 1-1 MASH ΔΣ Time-to-Digital Converter Employing one Counter for both Stages', فناوری آموزش, 7(2), pp. 173-182. doi: 10.22061/jecei.2020.6673.333
Mouri Zadeh Khaki, A., Farshidi, E., Ansari Asl, K.. A Novel Low-Power FPGA-based 1-1 MASH ΔΣ Time-to-Digital Converter Employing one Counter for both Stages. فناوری آموزش, 1398; 7(2): 173-182. doi: 10.22061/jecei.2020.6673.333


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